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Dynamic Register Allocation on AMD's RDNA 4 GPU Architecture
Modern GPUs often make a difficult tradeoff between occupancy (active thread count) and register count available to each thread.
Apr 5
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Chester Lam
24
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Dynamic Register Allocation on AMD's RDNA 4 GPU Architecture
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Inside Nvidia's GeForce 6000 Series
2025 has kicked off with a flurry of GPU activity.
Apr 1
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Chester Lam
23
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Inside Nvidia's GeForce 6000 Series
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11
March 2025
An Interview with Oxide's Bryan Cantrill
Hello you fine Internet folks,
Mar 28
•
George Cozma
11
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An Interview with Oxide's Bryan Cantrill
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RDNA 4's "Out-of-Order" Memory Accesses
Examining RDNA 4's out-of-order memory accesses in detail, and investigating with testing
Mar 23
•
Chester Lam
34
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RDNA 4's "Out-of-Order" Memory Accesses
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19
Looking Ahead at Intel’s Xe3 GPU Architecture
Examining software changes for hints on what Intel's next GPU architecture may bring
Mar 19
•
Chester Lam
26
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Looking Ahead at Intel’s Xe3 GPU Architecture
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14
Raytracing on Intel’s Arc B580
Edit: The article originally said Intel’s BVH nodes were 4-wide, based on a misreading of QuadLeaf.
Mar 14
•
Chester Lam
25
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Raytracing on Intel’s Arc B580
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11
AMD's RDNA4 Architecture (Video)
Hello you fine Internet folks,
Mar 5
•
George Cozma
22
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AMD's RDNA4 Architecture (Video)
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6
Zen 5's AVX-512 Frequency Behavior
Zen 5 is AMD's first core to use full-width AVX-512 datapaths.
Mar 1
•
Chester Lam
29
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Zen 5's AVX-512 Frequency Behavior
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14
February 2025
Intel’s Battlemage Architecture
Intel’s Alchemist architecture gave the company a foot in the door to the high performance graphics segment.
Feb 11
•
Chester Lam
39
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Intel’s Battlemage Architecture
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12
Alibaba/T-HEAD's Xuantie C910
T-HEAD is a wholly owned subsidiary of Alibaba, one of China's largest tech companies.
Feb 4
•
Chester Lam
26
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Alibaba/T-HEAD's Xuantie C910
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4
January 2025
A RISC-V Progress Check: Benchmarking P550 and C910
RISC-V has seen a flurry of activity over the past few years.
Jan 30
•
Chester Lam
26
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A RISC-V Progress Check: Benchmarking P550 and C910
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23
Inside SiFive’s P550 Microarchitecture
RISC-V is a relatively young and open source instruction set.
Jan 26
•
Chester Lam
40
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Inside SiFive’s P550 Microarchitecture
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16
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