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AMD's RDNA4 Architecture (Video)
Hello you fine Internet folks,
Mar 5
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George Cozma
19
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AMD's RDNA4 Architecture (Video)
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5
Zen 5's AVX-512 Frequency Behavior
Zen 5 is AMD's first core to use full-width AVX-512 datapaths.
Mar 1
•
Chester Lam
27
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Zen 5's AVX-512 Frequency Behavior
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14
February 2025
Intel’s Battlemage Architecture
Intel’s Alchemist architecture gave the company a foot in the door to the high performance graphics segment.
Feb 11
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Chester Lam
37
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Intel’s Battlemage Architecture
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10
Alibaba/T-HEAD's Xuantie C910
T-HEAD is a wholly owned subsidiary of Alibaba, one of China's largest tech companies.
Feb 4
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Chester Lam
25
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Alibaba/T-HEAD's Xuantie C910
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4
January 2025
A RISC-V Progress Check: Benchmarking P550 and C910
RISC-V has seen a flurry of activity over the past few years.
Jan 30
•
Chester Lam
24
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A RISC-V Progress Check: Benchmarking P550 and C910
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23
Inside SiFive’s P550 Microarchitecture
RISC-V is a relatively young and open source instruction set.
Jan 26
•
Chester Lam
39
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Inside SiFive’s P550 Microarchitecture
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15
Disabling Zen 5’s Op Cache and Exploring its Clustered Decoder
Zen 5 has an interesting frontend setup with a pair of fetch and decode clusters.
Jan 23
•
Chester Lam
18
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Disabling Zen 5’s Op Cache and Exploring its Clustered Decoder
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4
Sizing up MI300A’s GPU
AMD’s Instinct MI300A is a giant APU, created by swapping out two GPU chiplets (XCDs) for three CPU chiplets (CCDs).
Jan 20
•
Chester Lam
19
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Sizing up MI300A’s GPU
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2
Inside the AMD Instinct MI300A's Giant Memory Subsystem
AMD acquired ATI in 2006, hoping ATI's GPU expertise would combine with AMD's CPU know-how to create integrated solutions worth more than the sum of…
Jan 18
•
Chester Lam
23
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Inside the AMD Instinct MI300A's Giant Memory Subsystem
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Nvidia's Announcements at CES 2025
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Jan 15
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George Cozma
10
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Nvidia's Announcements at CES 2025
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1
AMD's Strix Halo - Under the Hood
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Jan 13
•
George Cozma
7
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AMD's Strix Halo - Under the Hood
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AMD's CES 2025 Keynote
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Jan 12
•
George Cozma
5
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AMD's CES 2025 Keynote
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3
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