Chips and Cheese

CES 2026: Taking the Lids off AMD's Venice and MI400 SoCs

Here at CES 2026, AMD showed off their upcoming Venice series of server CPUs and their upcoming MI400 series of datacenter accelerators.

Jan 6 • George Cozma

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Diving into Qualcomm's Upcoming Adreno X2 GPU with Eric Demers

Hello you fine Internet folks,

Jan 4 • George Cozma

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December 2025

Inside Nvidia GB10’s Memory Subsystem, from the CPU Side

GB10 is a collaboration between Nvidia and Mediatek that brings Nvidia’s Blackwell architecture into an integrated GPU.

Dec 31, 2025 • Chester Lam

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SC25: The Present and Future of HPC Networking with Cornelis Networks CEO Lisa Spelman

Hello you fine Internet folks,

Dec 19, 2025 • George Cozma

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Nvidia’s B200: Keeping the CUDA Juggernaut Rolling ft. Verda (formerly DataCrunch)

Nvidia has dominated the GPU compute scene ever since it became mainstream.

Dec 15, 2025 • Chester Lam

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SC25: Estimating AMD’s Upcoming MI430X’s FP64 and the Discovery Supercomputer

Hello, you fine Internet folks,

Dec 10, 2025 • George Cozma

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November 2025

Evaluating Uniform Memory Access Mode on AMD's Turin ft. Verda (formerly DataCrunch.io)

How does uniform memory access play out as interconnects get increasingly non-uniform?

Nov 26, 2025 • Chester Lam

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SC25: HACCing over 500 Petaflops on Frontier

Hello you fine Internet folks,

Nov 22, 2025 • George Cozma

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Qualcomm’s Snapdragon X2 Elite

Hello you fine Internet folks,

Nov 19, 2025 • George Cozma

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October 2025

Strix Halo’s Memory Subsystem: Tackling iGPU Challenges

Editor’s Note (11/2/2025): Due to an error in moving the article over from Google Docs to Substack, the “Balancing CPU and GPU Bandwidth Demands…

Oct 31, 2025 • Chester Lam

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Evaluating the Infinity Cache in AMD Strix Halo

Strix Halo is the codename for AMD’s highest end mobile chip, which is used in the Ryzen AI MAX series.

Oct 22, 2025 • Chester Lam

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AMD’s Chiplet APU: An Overview of Strix Halo

Hello you fine Internet folks!

Oct 18, 2025 • George Cozma

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