Chips and Cheese

SC25: Estimating AMD’s Upcoming MI430X’s FP64 and the Discovery Supercomputer

Hello, you fine Internet folks,

Dec 10 • George Cozma

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November 2025

Evaluating Uniform Memory Access Mode on AMD's Turin ft. Verda (formerly DataCrunch.io)

How does uniform memory access play out as interconnects get increasingly non-uniform?

Nov 26 • Chester Lam

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SC25: HACCing over 500 Petaflops on Frontier

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Nov 22 • George Cozma

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Qualcomm’s Snapdragon X2 Elite

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Nov 19 • George Cozma

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October 2025

Strix Halo’s Memory Subsystem: Tackling iGPU Challenges

Editor’s Note (11/2/2025): Due to an error in moving the article over from Google Docs to Substack, the “Balancing CPU and GPU Bandwidth Demands…

Oct 31 • Chester Lam

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Evaluating the Infinity Cache in AMD Strix Halo

Strix Halo is the codename for AMD’s highest end mobile chip, which is used in the Ryzen AI MAX series.

Oct 22 • Chester Lam

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AMD’s Chiplet APU: An Overview of Strix Halo

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Oct 18 • George Cozma

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Panther Lake’s Reveal at ITT 2025

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Oct 14 • George Cozma

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Interviewing Intel's Chief Architect of x86 Cores at Intel Tech Tour 2025

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Oct 9 • George Cozma

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September 2025

AMD’s EPYC 9355P: Inside a 32 Core Zen 5 Server Chip

High core count chips are headline grabbers.

Sep 30 • Chester Lam

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A Look into Intel Xeon 6’s Memory Subsystem

Intel’s server dominance has been shaken by high core count competition from the likes of AMD and Arm.

Sep 26 • Chester Lam

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AMD's Inaugural Tech Day ft. ROCm 7, Modular, and AMD Lab Tour

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Sep 22 • George Cozma

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