Intel’s Meteor Lake chip signaled a change in Intel’s mobile strategy, moving away from the monolithic designs that had characterized Intel’s client designs for more than a decade.
On the first diagram at the start , why is the Instruction Queue (IQ) located directly after the Instruction Cache (I-Cache) in the diagram ? Shouldn’t instructions be inserted into the IQ only after they are dispatched?
By IQ I mean a queue that holds instruction bytes placed immediately after the instruction cache. I know some people have used IQ to refer to schedulers in the backend, but they're more commonly called schedulers or reservation stations.
On the first diagram at the start , why is the Instruction Queue (IQ) located directly after the Instruction Cache (I-Cache) in the diagram ? Shouldn’t instructions be inserted into the IQ only after they are dispatched?
By IQ I mean a queue that holds instruction bytes placed immediately after the instruction cache. I know some people have used IQ to refer to schedulers in the backend, but they're more commonly called schedulers or reservation stations.