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Discrete GPUs have virtual memory support too, so GCN had page tables (though used virtually addressed caches so no TLB lookups on cache hit).

Applies to Nvidia as well, at least since Pascal (https://nvidia.github.io/open-gpu-doc/pascal/gp100-mmu-format.pdf) but NV likely had virtual memory support well before that

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Very interesting, thank you. Yes there was paging before Pascal, I found documentation for the changes when Pascal was done.

https://nvidia.github.io/open-gpu-doc/pascal/

The HBM paging seems to be 2MB large pages and the MMU generally is flexible to address the host.

https://arxiv.org/html/2408.11556v2

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