The significant improvement in the efficiency of the display engine is (IMHO) also important in view of the rather limited capabilities of the iGPU of desktop Zen5 Ryzens (As opposed to the strong iGPUs in "Ryzen AI" APUs). I doubt that many people would use even an entry level Zen5 CPU without pairing it with a dGPU even if not primarily used for gaming. And having a display engine with good efficiency plus upgraded encode and decode ASICs for video makes the RDNA4 GPUs even more of a believable alternative to 5060s and 5070s Blackwell GPUs.
I don't understand the advantage of split barriers. If I’m thinking correctly, the same performance can be achieved with normal barriers, just with a different instruction order.
Thanks Chester!
The significant improvement in the efficiency of the display engine is (IMHO) also important in view of the rather limited capabilities of the iGPU of desktop Zen5 Ryzens (As opposed to the strong iGPUs in "Ryzen AI" APUs). I doubt that many people would use even an entry level Zen5 CPU without pairing it with a dGPU even if not primarily used for gaming. And having a display engine with good efficiency plus upgraded encode and decode ASICs for video makes the RDNA4 GPUs even more of a believable alternative to 5060s and 5070s Blackwell GPUs.
Thank you for this article!
I don't understand the advantage of split barriers. If I’m thinking correctly, the same performance can be achieved with normal barriers, just with a different instruction order.
Am I thinking about this correctly?