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David. Hellyx's avatar

What I see here is that since vega AMD could have a much more competent and efficient architecture using this type of implementation.

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Dante Fr.'s avatar

I wonder if the RDNA3.5+ architecture, which will be used in the next batch of APUs, will focus solely on this kind of optimization and support for FP8 (FSR4). This is because RDNA4's RT cores take up significant space, making the design overly bulky without providing enough ray tracing performance to justify it(?) Just guessing.

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