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Steffen Schaumburg's avatar

I'm a bit confused by those 48 PCIe6 lanes - doesn't an x16 PCIe6 link already do 121GB/s (net)? That's what Wikipedia says anyway. Obviously you need to allow some headroom - but even x32 would leave well over 50% of theoretical bandwidth to spare?

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Peksha's avatar

We need more details on the SM design - more and more details are coming out that it's all Ada silicon, which is an Ampere by itself. 0% IPC gain

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